Parallel Processing on VLSI Arrays

Parallel Processing on VLSI Arrays

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Guest Editor: JOSEF A. NOSSEK This is a special issue of the Journal of VLSI Signal Processing comprising eight contributions invited for publica tion on the basis of novel work presented in a special session on qParallel Processing on VLSI Arraysq at the International Symposium on Circuits and Systems (ISCAS) held in New Orleans in May 1990. Massive parallelism to cope with high-speed requirements stemming from real-time applications and the restrictions in architectural and circuit design, such as regularity and local connectedness, brought about by the VLSI technology are the key questions addressed in these eight papers. They can be grouped into three subsections elaborating on: a€c Simulation of continuous physical systems, i. e. , numerically solving partial differential equations. a€c Neural architectures for image processing and pattern recognition. a€c Systolic architectures for implementing regular and irregular algorithms in VLSI technology. The paper by A. Fettweis and O. Nitsche advocates a signal processing approach for the numerical integration of partial differential equations (PD Es). It is based on the principles of multidimensional wave digital filters (MDWDFs) thereby preserving the passivity of energy dissipating physical systems. It is particularly suited for systems ofPDEs involving time and finite propagation speed. The basic ideas are explained using Maxwell's equa tions as a vehicle for the derivation of a multidimensional equivalent circuit representing the spatially infinitely extended arrangement with only very few circuit elements.Parallel. Viterbi. Decoding. G. FETTWEIS IBM Almaden Research Center, 650 Harry Road, San Jose, CA, 95120-6099 H. ... The word level can allow transformations of the signal-flow diagram or algebraic transformations of the algorithm itself.

Title:Parallel Processing on VLSI Arrays
Author: Josef A. Nossek
Publisher:Springer Science & Business Media - 2012-12-06

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